#no spaces, please
#!=hw_version=0x11010160
H=version=5
H=dSMC_DAC1a=0x7000
H=dSMC_DAC2a=0x5000
H=dSMC_OFFSET=0x9500=c
H=dSMC_clock=(4 << 8)
H=mains_offset=0x4100
B=dSMC_BITD=0xBB
B=dSMC_BLANK1=0x00
B=dSMC_BLANK2=0x00
B=dSMC_BCRS=0x00
B=dSMC_PRGR=0x66
B=dSMC_TESTMUX=0x80
2H=upstream_start_gaps0=(1.440e-3 + -140e-6) * 64 / 384e-6 + .5=(1.440e-3 + -150e-6) * 64 / 384e-6 + .5
H=upstream_between_gap=(7.008e-3 - 1.440e-3)*64/384e-6 - (64*5+64*1/2+18+4+4)/4*4 - 9
B=upstream_carrier_threshold=0x0
B=downstream_mode=0
B=downstream_single_bit_shape=1
B=reserved=0
I=power_calibration_high=1=c
I=power_calibration_low=1=c
H=power_voltage_offset=0=c
H=power_current_offset_high=0=c
H=power_current_offset_low=1500=c
H=temperature_offset=621
H=downstream_debug=0x0
H=trigger_MODI=1.0 / 3.5 * (1 << 12) + 0.5
